Phase shifted design verification routine

Details Phase shifted design verification routine Phase shifted design verification routine

1997-03-25

1999-07-13

Teska, Kevin J.

Boots, shoes, and leggings

430 5, 430311, 430322, G06F 1700, G06F 1750

Patent

active

059235667

ABSTRACT:
A computer-implemented routine that verifies that an existing chip design can be converted to a PSM or reports localized design conflicts based solely on a knowledge of the specific design constraints applied in the targeted PSM design system and without a prior knowledge of specific layout configurations that will cause PSM design errors.

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patent: 5766804 (1998-06-01), Spence
patent: 5795685 (1998-08-01), Liebmann et al.
patent: 5807649 (1998-09-01), Liebmann et al.

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