Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1993-06-23
1997-12-16
Tse, Young T.
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375374, 327157, H04L 7033
Patent
active
056993870
ABSTRACT:
A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.
REFERENCES:
patent: 4885554 (1989-12-01), Wimmer
patent: 4908841 (1990-03-01), Leis et al.
patent: 5036216 (1991-07-01), Hohmann et al.
patent: 5052022 (1991-09-01), Nishita et al.
patent: 5079520 (1992-01-01), Rapeli
patent: 5081655 (1992-01-01), Long
patent: 5097489 (1992-03-01), Tucci
patent: 5142246 (1992-08-01), Petersson
patent: 5166641 (1992-11-01), Davis et al.
patent: 5278702 (1994-01-01), Wilson et al.
patent: 5313499 (1994-05-01), Coburn
patent: 5432481 (1995-07-01), Saito
Chau Raymond
Colbeck Roger P.
Leung Simon C. F.
Seto Jim M. N.
ATI Technologies Inc.
Tse Young T.
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