Phase-locked loops

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

328156, 328157, 328133, 328134, 307511, 307525, 307529, H03K 513, H03K 906, G05F 500

Patent

active

047913789

ABSTRACT:
A digital phase-locked loop using a binary overflowing accumulator as a numerically controlled oscillator has external compensation to eliminate frequency-dependent phase offset problems while not requiring any second-order filtering.
Operation of the NCO adder initiates with value set by the center frequency control and under the latching action of the latch clocked by the reference oscillator produces a linearly stepped output. Detection of the most-significant bit values produces a square wave at the output. The phase detector latch is used for phase correction, while comparator eliminates steady-state phase error.

REFERENCES:
patent: 4577163 (1986-03-01), Culp

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