Phase locked loop without a charge pump and integrated...

Details Phase locked loop without a charge pump and integrated... Phase locked loop without a charge pump and integrated...

2007-10-18

2009-12-22

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S148000, C331S017000, C375S374000

Reexamination Certificate

active

07636000

ABSTRACT:
A phase locked loop includes a phase-frequency detector and a loop filter. The phase-frequency detector compares phases of an input signal and a feedback signal to generate first and second control signals. The loop filter includes a pull-up resistor, a pull-down resistor and a capacitance unit. The loop filter receives a first reference voltage to charge the capacitance unit through a path formed by the pull-up resistor to the capacitance unit, receives a second reference voltage to discharge the capacitance unit through a path formed by the pull-down resistor to the capacitance unit and outputs a control voltage generated based on a charge amount of the charged capacitance unit. Therefore, the phase locked loop can operate at a relatively low voltage and can operate based on a control voltage with a wide input range.

REFERENCES:
patent: 6356157 (2002-03-01), Kawamura
patent: 6727735 (2004-04-01), Park
patent: 6909312 (2005-06-01), Mitsumoto
patent: 7088797 (2006-08-01), Momtaz et al.
patent: 11-355134 (1999-12-01), None
patent: 2000-0070300 (2000-11-01), None
patent: 10-0422578 (2004-03-01), None
Sun, Lizhong, et al., A 1.0V GHz Range 0.13μm CMOS Frequesncy Synthesizer, IEEE Custom Integrated Circuits Conference, 2001, pp. 327-330, IEEE.
Gu, Richard, et al., A 6.25GHz 1V LC-PLL in 0.13μm CMOS, ISSCC 2006/Session 32, 2006, IEEE International Solid-State Circuits Conference.

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