Phase locked loop for an OFDM system

Details Phase locked loop for an OFDM system Phase locked loop for an OFDM system

2007-04-10

2007-04-10

Patel, Jay K. (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S374000, C375S375000

Reexamination Certificate

active

10413700

ABSTRACT:
Techniques are provided for tracking residual frequency error and phase noise in an OFDM system. At a receiver, each received OFDM symbol is transformed with an FFT to obtain received modulation symbols, which are serialized. A phase locked loop (PLL) operates on the serialized received modulation symbols and provides an independent phase correction value for each received modulation symbol. Each received modulation symbol is corrected with its own phase correction value to obtain a phase-corrected symbol. The phase error in each phase-corrected symbol is detected to obtain a phase error estimate for that phase-corrected symbol. The phase error estimate for each phase-corrected symbol is filtered (e.g., with a second-order loop filter) to obtain a frequency error estimate, which is accumulated to obtain a phase correction value for another received modulation symbol. The phase-corrected symbols are not correlated because independent phase correction values are used for the received modulation symbols.

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Speth, Michael et al., Optimum Receiver Design for OFDM-Based Broadband Transmission-Part II,IEEE Transactions on Communications, vol. 49, No. 4 (Apr. 2001).

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