Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1994-09-20
1996-01-09
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375371, 375373, 331 14, 331 34, 331 25, 331 1A, H03D 324
Patent
active
054835593
ABSTRACT:
A PLL device includes a VCO (10) forming a phase-locked loop and an amplifier (18) for outputting a phase change signal having phase function with respect to frequencies, a synthesizer (20) having a first input receiving an error signal (phase comparison signal) from a phase comparator (2) through an LPF (4) and a second input for synthesizing signals at the first and second inputs to output a synthetic signal, and a phase and amplitude changer (15) for changing the phase and amplitude of the synthetic signal to provide a phase and amplitude change signal to the second input of the synthesizer in response to the error signal, the synthetic signal acting as an oscillation signal of the VCO (10), whereby the PLL device has a small variation in free-running frequency and a wide lock range.
REFERENCES:
patent: 4234858 (1980-11-01), Gomi
patent: 4916412 (1990-04-01), Nordholt et al.
Bipolar and CMOs Analog Integrated Circuit Design, A. B. Grebene, pp. 668-673, "12.6 Voltage-Controlled Oscillators".
Bipolar and CMOS Analog Integrated Circuit Design, A. B. Grebene, pp. 628-635, "12.1 Principle of a PLL System".
Chin Stephen
Luu Huong
Mitsubishi Denki & Kabushiki Kaisha
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