Phase-locked loop circuit, delay-locked loop circuit and...

Details Phase-locked loop circuit, delay-locked loop circuit and... Phase-locked loop circuit, delay-locked loop circuit and...

2007-02-28

2009-02-24

Nguyen, Long (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S141000, C327S155000, C327S157000

Reexamination Certificate

active

07495488

ABSTRACT:
A phase-locked loop (PLL) circuit includes a phase/frequency detector (PFD), a charge pump, a loop filter, a control circuit, a VCO, and a feedback circuit. The control circuit generates a digital control signal in response to the up signal, the down signal, and the oscillation-control voltage. The VCO generates an output signal of which a frequency is changed in response to the oscillation-control voltage and the digital control signal. Accordingly, the PLL circuit can automatically tune the frequency of the output signal of a VCO using a digital circuit having a simple structure.

REFERENCES:
patent: 5923196 (1999-07-01), Okamoto
patent: 6870411 (2005-03-01), Shibahara et al.
patent: 7154348 (2006-12-01), Lee et al.
patent: 2000-49597 (2000-02-01), None
patent: 2002-111492 (2002-04-01), None
patent: 2003-78410 (2003-03-01), None
patent: 10-2005-0037304 (2005-04-01), None

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