Phase-locked loop circuit and radio communication apparatus usin

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

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Details

375219, 375376, 327142, H04L 700, H04L 516

Patent

active

061635855

ABSTRACT:
A phase-locked loop circuit includes a current output type phase comparator for converting a phase difference between a first signal and a second signal into a current signal to be outputted, a low pass filter for filtering the current signal of the current output type phase comparator to produce an output signal, a voltage controlled oscillator for producing an output signal having a frequency corresponding to the output signal of the low pass filter, a current source for supplying a current to an input of the low pass filter, a reset switch for applying to the voltage controlled oscillator a reset voltage for canceling a phase-locked state of the phase-locked loop, and a frequency converter for frequency-converting the output signal of the voltage controlled oscillator to produce the second signal.

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Phaselock Techniques, Chapter 10.3, "Translation Loops", pp. 204-207, date unknown, John Wiley & Sons, ISBN 0-471-04294-3.
Design Technique of Analog Integrated Circuit for Super LSI, Last Volume, Chapters 10.3.2, 10.3.3, and 10.3.4, pp. 172-183, Baikufan, date unknown (in Japanese).
D. Turner, "Phase-Locked Loop Phase Adjustment", IBM Technical Disclosure Bulletin, vol. 15, No. 7, Dec. 1972, pp. 2080-2081.

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