Phase-locked loop circuit

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S374000, C375S354000, C327S141000, C327S147000, C327S146000, C327S148000, C327S155000, C327S156000

Reexamination Certificate

active

07120217

ABSTRACT:
In a PLL circuit including a voltage-controlled oscillator, a phase detector and a final control element, the final control element contains two separate channels, between the phase detector and the voltage controlled oscillator, wherein one channel processes the useful signal components and the other channel processes the disturbance signal components of the synchronization pulses. Each channel has two tracks, for generation of a potential difference, wherein each track is connected to a capacitor plate.

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