Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2005-06-21
2005-06-21
Corrielus, Jean B. (Department: 2637)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C327S156000, C327S159000, C331SDIG002
Reexamination Certificate
active
06909762
ABSTRACT:
Method and circuitry for improving the accuracy and efficiency of a phase-locked loop. More specifically, the present invention relates to a method and device for monitoring the frequency discrepancy between two signals in conjunction with at least one data signal so as to improve the accuracy and efficiency of a phase-locked loop. In one embodiment of the present invention, two counters are used to check the frequency differential between a VCO signal and an external reference or input signal. An adjustable threshold is provided to determine whether the frequencies of the two signals are considered to be in a frequency-locked mode. A pair of flip-flops is used to minimize any erroneous detection of frequency discrepancy by validating two consecutive results of the frequency differential check. In addition, a data present signal is used to control the transition between the phase-locked mode and the frequency-locked mode to minimize the potential data loss.
REFERENCES:
patent: 5327103 (1994-07-01), Baron et al.
patent: 5406592 (1995-04-01), Baumert
patent: 5473639 (1995-12-01), Lee et al.
patent: 5483558 (1996-01-01), Leon et al.
patent: 5656977 (1997-08-01), Kelkar et al.
patent: 5799049 (1998-08-01), McFarland et al.
patent: 5870002 (1999-02-01), Ghaderi et al.
patent: 5896428 (1999-04-01), Yanagiuchi
patent: 5905410 (1999-05-01), Holmes et al.
patent: 5943613 (1999-08-01), Wendelrup et al.
patent: 6100721 (2000-08-01), Durec et al.
patent: 6215834 (2001-04-01), McCollough
patent: 6222400 (2001-04-01), Fukuda et al.
patent: 6259290 (2001-07-01), Takada et al.
patent: 6314150 (2001-11-01), Vowe
patent: 6320469 (2001-11-01), Friedberg et al.
patent: 6353647 (2002-03-01), Wilhelmsson et al.
patent: 6803827 (2004-10-01), Kenney et al.
patent: 8-97717 (1996-04-01), None
Cao Jun
Momtaz Afshin
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