Phase-locked loop circuit

Details Phase-locked loop circuit Phase-locked loop circuit

1997-02-04

1999-02-02

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

331 25, 327156, H03D 324

Patent

active

058675450

ABSTRACT:
A phase-locked loop circuit, in which it takes a very short time until the internal clock becomes stable while switching external clocks, is provided with a phase comparison part, a voltage controlled oscillating part, plural dummy clock producing parts, a selection supply part and a monitor control part. The phase comparison part outputs a voltage corresponding to a phase difference between two inputted clocks. The voltage controlled oscillating part outputs an internal clock of a frequency corresponding to the voltage outputted from the phase comparison part. The plural dummy clock producing parts produce dummy clocks by dividing an internal clock outputted from the voltage control oscillating part, respectively, while resetting the respective dividing operations in synchronous with inputted external clocks. The selection supply part supplies an external clock selected among plural external clocks inputted into said plural dummy clock producing parts and a dummy clock outputted from a dummy clock producing part receiving the external clock to the phase comparison part. The monitor control part monitors the states of the plural external clock and controls the selection supply part in a manner that a normal external clock is inputted into the phase comparison part. Moreover, the monitor control part controls the dummy clock producing part which the normal external clock is inputted in a manner that a dummy clock is produced without the reset of the dividing operation.

REFERENCES:
patent: 5184350 (1993-02-01), Dara
patent: 5260979 (1993-11-01), Parker et al.
patent: 5455840 (1995-10-01), Nakauchi et al.
patent: 5483204 (1996-01-01), Tanoi
patent: 5689536 (1997-11-01), Iyota et al.

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