Phase-locked loop capable of generating a plurality of stable fr

Details Phase-locked loop capable of generating a plurality of stable fr Phase-locked loop capable of generating a plurality of stable fr

1983-12-27

1986-12-16

La Roche, Eugene

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 17, 331 46, H03B 700

Patent

active

046299998

ABSTRACT:
A phase-locked loop capable of generating a plurality of stable frequncy signals. This loop includes a plurality of voltage controlled oscillators which are sequentially coupled to the output of a phase sensitive detector by a multiplexer. RF switches then sequentially couple, in synchronism with the multiplexer, the oscillator outputs to a programmable divider which, in turn, is coupled to an input of the phase sensitive detector, the other input thereto being coupled to a reference oscillator. The dividing factors for the programmable divider are inputted thereto, in synchronism with the multiplexer, from a memory.

REFERENCES:
patent: 3729688 (1973-04-01), Cerny, Jr. et al.
patent: 4510461 (1985-04-01), Dickes et al.

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