Phase-locked loop and method thereof and a phase-frequency...

Details Phase-locked loop and method thereof and a phase-frequency... Phase-locked loop and method thereof and a phase-frequency...

2005-12-22

2008-05-20

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By phase

C327S005000, C327S007000, C327S012000, C327S040000, C327S049000, C327S156000, C327S159000

Reexamination Certificate

active

07375557

ABSTRACT:
The phase-frequency detector may include a first flip-flop configured to generate a first signal, the first signal transitioning to a first logic level in response to a first edge of a first input signal and transitioning to a second logic level in response to a delayed reset signal and a second flip-flop configured to generate a second signal, the second signal transitioning to the first logic level in response to a second edge of a second input signal and transitioning to the second logic level in response to the delayed reset signal. The phase-frequency detector may further include a first delay unit configured to delay a reset signal to generate the delayed reset signal and a second delay unit configured to delay the reset signal to generate an output control signal for adjusting at least one of the first and second signals.

REFERENCES:
patent: 4598217 (1986-07-01), Predina et al.
patent: 6049233 (2000-04-01), Shurboff
patent: 6157218 (2000-12-01), Chen
patent: 6323692 (2001-11-01), Tsinker
patent: 6483389 (2002-11-01), Lamb
patent: 6636079 (2003-10-01), Koyama
patent: 7003065 (2006-02-01), Homol et al.
patent: 2002/0021159 (2002-02-01), Takahashi
patent: 2005/0219001 (2005-10-01), Booth
patent: 2001-230668 (2001-08-01), None
patent: 10-2004-0072263 (2004-08-01), None

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