Phase jitter extraction circuit and phase jitter cancellation ci

Details Phase jitter extraction circuit and phase jitter cancellation ci Phase jitter extraction circuit and phase jitter cancellation ci

1995-09-26

1998-02-17

Bocure, Tesfaldet

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375222, H04L 2538, H04L 516

Patent

active

057199078

ABSTRACT:
The invention provides a phase jitter extraction circuit and a phase jitter cancellation circuit for use with a reception section of a communication apparatus such as a modem used to transmit data using a telephone line or a private line, which are improved in that noise of a signal is prevented from increasing to suppress phase jitters with a high degree of accuracy and high noise components can be suppressed irrespective of the power of the input signal. The phase jitter extraction circuit includes a phase jitter detection section for detecting phase jitters from input/output information of a signal discriminator, a phase jitter forecasting section for forecasting phase jitters which will be produced later from the phase jitters detected by the phase jitter detection section, a selector for selectively outputting the phase jitters detected by the phase jitter detection section or the forecast phase jitters obtained by the phase jitter forecasting section, and a selector control section for discriminating a region of signal points received by the communication apparatus by way of a transmission line and controlling the selector in accordance with a result of the discrimination.

REFERENCES:
patent: 4689804 (1987-08-01), Srinivasagopalan et al.
patent: 4953186 (1990-08-01), Levy et al.
patent: 5128968 (1992-07-01), Yoshida
patent: 5175746 (1992-12-01), Inoue et al.
patent: 5280473 (1994-01-01), Rushing et al.
patent: 5388122 (1995-02-01), Kawada et al.
patent: 5434884 (1995-07-01), Rushing et al.
Abstract of Japanese Patent Publ. No. 1-93951, dated Apr. 12, 1989.

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