Phase-interpolator based PLL frequency synthesizer

Details Phase-interpolator based PLL frequency synthesizer Phase-interpolator based PLL frequency synthesizer

2007-01-09

2007-01-09

Ghayour, Mohammed (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S362000, C375S373000, C375S374000, C375S375000, C455S260000

Reexamination Certificate

active

10284341

ABSTRACT:
A phase lock loop frequency synthesizer includes a phase rotator in the feedback path of the PLL. The PLL includes a phase detector, a low pass filter, a charge pump, a voltage controlled oscillator (“VCO”), and a feed back path connecting output of the VCO to the phase detector. The feedback path includes a phase rotator connected to the output of the VCO and to an input of a frequency divider. Coarse frequency control is implemented by adjusting the input reference frequency to the phase detector or by adjusting the divider ratio of the frequency divider. Fine frequency control is achieved by increasing or decreasing the rotation speed of the phase rotator. The phase rotator constantly rotates phase of the VCO output, thereby causing a frequency shift at the output of the phase rotator. The rotation speed of the phase rotator is controlled by an accumulator and a digital frequency control word. Any high frequency noise generated by the phase rotator is rejected by the PLL by properly setting the PLL bandwidth so that the noise falls outside the bandwidth of the PLL. Therefore, a low noise synthesized output from the VCO is generated.

REFERENCES:
patent: 4424486 (1984-01-01), Denton et al.
patent: 4816775 (1989-03-01), Ryan
patent: 5485490 (1996-01-01), Leung et al.
patent: 5570066 (1996-10-01), Eberhardt et al.
patent: 5920216 (1999-07-01), Fischer
patent: 6002279 (1999-12-01), Evans et al.
patent: 6122336 (2000-09-01), Anderson
patent: 6310498 (2001-10-01), Larsson
patent: 6363124 (2002-03-01), Cochran
patent: 6397042 (2002-05-01), Prentice et al.
patent: 6473470 (2002-10-01), Matui
patent: 6509773 (2003-01-01), Buchwald et al.
patent: 6570946 (2003-05-01), Homol et al.
patent: 6901126 (2005-05-01), Gu
patent: 6922109 (2005-07-01), Fallahi et al.
patent: 2001/0006544 (2001-07-01), Kawasaki et al.
patent: 2002/0021153 (2002-02-01), Saeki
patent: 2003/0185327 (2003-10-01), Chen
patent: 0 909 035 (1999-04-01), None
patent: WO 00/46949 (2000-08-01), None
patent: WO 01/84702 (2001-11-01), None
patent: WO 01/84702 (2001-11-01), None
Larsson,A 2-1600-MHz CMOS Clock Recovery PLL With Low-Vdd Capability, IEEE Journal of Solid-State Circuits, vol. 34, No. 12, Dec. 1999, pp. 1951-1960.
European Search Report for Appl. No. EP 03 00 4684, issued May 19, 2003, 4 pages.

Affiliated with

Also associated with

Rating

Phase-interpolator based PLL frequency synthesizer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Phase-interpolator based PLL frequency synthesizer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase-interpolator based PLL frequency synthesizer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3738033