Phase error detector for a phase locked loop

Details Phase error detector for a phase locked loop Phase error detector for a phase locked loop

1993-08-19

1995-07-25

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375375, 331 1A, 331 25, 331 57, 327147, H03D 324

Patent

active

054369380

ABSTRACT:
A phase lock loop (PLL) arrangement includes a voltage controlled ring oscillator (VCRO) including delay elements whose delay is controlled by a control voltage produced by the PLL. A phase error detector is provided which compares pulses of a PLL feedback frequency with pulses of a delayed reference signal, the delay being provided by further delay elements controlled by the same control voltage. The phase error detector produces an output signal which indicates when phase error exceeds a predetermined tolerance, and also indicates an absence of frequency lock.

REFERENCES:
patent: 3931588 (1976-01-01), Gehweiler
patent: 4494021 (1985-01-01), Bell et al.
patent: 4706040 (1987-11-01), Mehrgardt
patent: 4859970 (1989-08-01), Matsuo et al.
patent: 4988960 (1991-01-01), Tomisawa
patent: 5126691 (1992-06-01), Mijuskovic et al.
patent: 5250913 (1993-10-01), Gleichert et al.

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