Phase detector circuit and method of phase detecting

Details Phase detector circuit and method of phase detecting Phase detector circuit and method of phase detecting

1997-12-23

2000-10-24

Pham, Chi H.

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375327, H03D 324

Patent

active

061378526

ABSTRACT:
An image reject receiver (10) uses a mixer circuit (12) and a mixer circuit (16) to frequency translate an incoming reference signal (RF.sub.IN) and generate a first output signal (V.sub.OUT1) and a second output signal (V.sub.OUT2), respectively. Two phase detectors (26 and 36) measure a phase difference between the first and second output signals (V.sub.OUT1, and V.sub.OUT2) and a difference circuit (30) provides a difference value in accordance with the phase difference. The difference value cancels any phase shift due to time delays associated with the phase detectors (26 and 36). The difference value is fed back to a phase shift circuit (20) for adjusting the phase of the second output signal (V.sub.OUT2) and locking the first output signal (V.sub.OUT1) in-phase with the second output signal (V.sub.OUT2).

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