Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2006-12-29
2008-11-11
Pham, Ly D (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S194000, C365S230080, C365S233100, C365S233500, C327S002000
Reexamination Certificate
active
07450443
ABSTRACT:
A phase detection method for detecting a phase difference between a data strobe signal and a clock signal, includes: latching the clock signal according to the data strobe signal to generate a phase lead/lag detection result; delaying the data strobe signal to generate a plurality of delayed data strobe signals; latching the clock signal according to the delayed data strobe signals to generate a plurality of phase detection results corresponding to the delayed data strobe signals, respectively; and if the phase lead/lag detection result indicates that the data strobe signal leads the clock signal, utilizing the phase detection results to represent the phase difference between the data strobe signal and the clock signal. A memory control method and a memory control circuit respectively corresponding to the phase detection method are further provided.
REFERENCES:
patent: 7245553 (2007-07-01), Lin et al.
patent: 2006/0140022 (2006-06-01), Lee
patent: 2007/0257717 (2007-11-01), Yoon
Hsu Winston
Nanya Technology Corp.
Pham Ly D
LandOfFree
Phase detection method, memory control method, and related... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Phase detection method, memory control method, and related..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase detection method, memory control method, and related... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4027035