Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1997-01-02
1999-02-23
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375376, 375373, 375371, 327156, 327155, 327144, 327244, 327243, H03D 324
Patent
active
058752196
ABSTRACT:
A digital delay locked loop (DLL) includes a phase detector for outputting a comparing signal by comparing a system clock signal with a chip clock signal, a shift register for sequentially shifting data bit values in both the directions in accordance with the comparing signal, a phase delay unit for delaying and outputting the system clock signal in accordance with each bit value of the shift register, a domain selecting controller for detecting an overflow or an underflow condition of the shift register and outputting a domain selection controlling signal, and a domain selector for adjusting the phase of a driving signal from one region comprising 0.degree..about.180.degree. and to another area comprising 180.degree..about.360.degree. and carrying out a domain transition whenever an overflow or an underflow condition is generated when the phase reaches a boundary region of the two domains.
REFERENCES:
patent: 4221005 (1980-09-01), La Flame
patent: 5062122 (1991-10-01), Pham et al.
patent: 5087829 (1992-02-01), Ishibashi et al.
patent: 5179574 (1993-01-01), Watanabe et al.
patent: 5579351 (1996-11-01), Kim
patent: 5646564 (1997-07-01), Erickson et al.
Chin Stephen
LG Semicon Co. Ltd.
Maddox Michael W.
LandOfFree
Phase delay correction apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Phase delay correction apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Phase delay correction apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-313365