Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
1995-03-01
2002-09-24
Bocure, Tesfaldet (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C327S142000
Reexamination Certificate
active
06456679
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a phase-coupled clock signal generator comprising a start-stop oscillator having an input for receiving a control signal to allow oscillation in response to a first value of the control signal and no oscillation in response to a second value of the control signal. The invention also relates to a character generator for generating characters on a display screen, which generator comprises such a clock signal generator.
Of interest is commonly owned copending application entitled “Start-Stop Oscillator” Ser. No. 625,234 filed concurrently herewith in the name of the present inventor.
DESCRIPTION OF THE PRIOR ART
A Phase Locked Loop (PLL) is often used for generating a clock signal. Such a PLL generates a continuous clock signal which is coupled in phase and frequency to an applied periodical reference signal. Phase coupling of a clock signal to a reference signal, which will further be referred to as control signal, is also achieved by means of a start-stop oscillator. Such a start-stop oscillator is described in British Patent Specification GB 1,276,025. The start-stop oscillator oscillates at a predetermined frequency when the first value of the control signal is being applied and does not oscillate in response to the second value of the control signal. Consequently, the clock signal generated by the start-stop oscillator is discontinuous. The phase coupling is realized in that oscillation starts under the same conditions whenever the first value of the control signal occurs. The frequency is independent of the control signal and is only determined by the dimensioning of appropriate components.
In various applications of a clock signal generator only the phase coupling with the control signal is important. An accurate frequency coupling is then superfluous and the discontinuity in the clock signal is acceptable. In these cases the use of the start-stop oscillator is preferred to the PLL for economical reasons. An example of such an application is a character generator for displaying characters on a display screen. A line flyback signal is used as a control signal. A stable picture is obtained by the phase coupling of the clock signal to this line flyback signal. In a character generator the frequency of the clock signal determines the width of the characters and need not be accurate. It is sufficient for the frequency to have a value between two predetermined limits and to be further stable.
In practice it has been found difficult to realized the frequency-determining components of a start-stop oscillator in an integrated circuit (IC) within the required tolerance limits. The known clock signal generators therefore comprise external precision components or external adjustable components for adjusting the desired frequency. However, such components as well as the required connection pins on an IC raise the cost of the clock signal generator. Moreover, adjusting the components is a time-consuming and costly activity.
SUMMARY OF THE INVENTION.
It is one of the objects of the invention to provide a phase-coupled clock signal generator comprising a start-stop oscillator in which the drawbacks are obviated. To this end the clock signal generator according to the invention is characterized in that the start-stop oscillator is of a type whose generated frequency is adjustable by means of an applied adjusting value and in that the clock signal generator comprises control means for adapting the adjusting value in response to a difference between the generated frequency and a predetermined desired frequency. It is achieved with the control means that the desired frequency is obtained autonomously without any further adjustments, if the frequency range of the start-stop oscillator covers this desired frequency. Such a frequency range need not be accurately defined in itself., The only requirement imposed is that the desired frequency falls within this range. Critical components are not required for dimensioning such a frequency range. Consequently, components can be used with such a tolerance that they can be realized in an IC. This makes the pins for connecting the external components superfluous, thus also avoiding the problem that such pins, which convey signal variations with the generated frequency, generate electromagnetic radiation causing interference with other neighboring circuits.
A start-stop oscillator of the type is described in copending Application comprises a capacitor, a current source for charging the capacitor, in which the value of the current corresponds to the applied adjusting value, a discharge circuit for discharging the capacitor, a threshold circuit for switching on the discharge circuit in response to reaching a predetermined first voltage across the capacitor and for switching off the discharge circuit in response to a second voltage across the capacitor, and a stop circuit for switching on the discharge circuit in response to the second value of the applied control signal. Such an embodiment of the start-stop oscillator can be dimensioned in a conventional economical IC technology.
An embodiment of the clock signal generator according to the invention is characterized in that the control means are adapted to generate a counting value which corresponds to the generated frequency, to compare the counting value with a reference value which corresponds to the desired frequency, and to adapt the adjusting value in response to the difference between the counting value and the reference value. Such control means can be realized with simple digital components and integrated on an IC together with other circuits. This will be very much appreciated if it is considered that the phase-coupled clock signal generator can now be incorporated in an IC together with, for example a character generator.
A favorable embodiment of the clock signal generator, in which the control signal is periodical, is characterized in that the control means for generating the counting value comprise a counting circuit for counting clock pulses in the clock signal during the period when the first value of the control signal is available. Such an embodiment has the advantage that a defined periodical time interval required for generating the counting value is used without any additional provisions.
A further favorable embodiment of the clock signal generator according to the invention is characterized in that the control means are realized to adapt the adjusting value, if the difference between the counting value and the reference value is larger than a predetermined value. This results in the effect that the frequency, if gradually changing due to, for example, temperature effects, is not adapted until it has varied by more than a predetermined value. This will be very much appreciated when using the clock signal generator in a character generator in which a slow variation of the frequency, and hence of the character width, is acceptable. A steady and stable picture is obtained with the embodiment by correcting the frequency only after it has reached predetermined limits.
A further embodiment of the clock signal generator according to the invention is characterized in that the input of the start-stop oscillator for receiving the control signal is coupled to delay means for delaying the transition from the first to the second value of the control signal. This provides the effect that the oscillator reaches its non-oscillating state only with a predetermined delay upon the transition to the second value of the control signal. This is particularly sensible in applications of the clock signal generator in which the periodical discontinuity in the clock signal is acceptable, but must remain limited in time. For example, a character generator is enabled to perform tasks also during the line flyback period.
As previously stated, a clock signal generator according to the invention is eminentlysuitable for integration with, for example a character generator. Such a character generator comprises, inter alia, a horizontal position counter to which the clock
Bocure Tesfaldet
Koninklijke Philips Electronics , N.V.
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