Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2001-09-21
2002-07-16
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S009000
Reexamination Certificate
active
06420918
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to the field of synchronizing oscillators, and in particular, to a phase locked loop having a phase detector for generating upwardly scaled control voltages.
Many voltage controlled oscillators (VCO), particularly crystal oscillators (VCXO), are controlled by varactors. A varactor can be described as a reverse biased diode that exhibits a capacitance dependent upon the magnitude of the reverse bias voltage applied to it. The resonant frequency of the oscillator can be controlled by the bias voltage. Insufficient bias voltage to attain a given operating frequency or range of frequencies can present a serious problem. This situation is illustrated in
FIG. 6
, which shows a phase locked loop. A phase detector
56
has the output of a horizontal oscillator and a horizontal synchronizing component as respective inputs. Current flows between the output of the phase detector and an integrator
58
, often formed by two capacitors and resistor as shown.
Varactors
62
control a voltage controlled oscillator
64
. The varactors require, for example, a bias voltage up to +15 volts DC, but the control voltage developed by the integrator
58
is too small. Accordingly, an operational amplifier
60
is interposed between the integrator
58
and the varactors
62
to scale up, that is, to increase the magnitude of the control voltage to 15 volts, the supply voltage for the operational amplifier. The need for a separate scaler increases the complexity and cost of the phase locked loop, and moreover, requires that the design of each phase locked loop be re-engineered.
There is a long-felt need for a phase detector that can directly supply control voltages at a variety of voltages and/or over different ranges of voltages. Moreover, there is a long-felt need to provide a phase locked loop that can utilize such a phase detector in a simplified, less expensive arrangement that can easily be modified to accommodate different desired voltages and ranges of voltages.
SUMMARY OF THE INVENTION
In accordance with the inventive arrangements the output of a phase detector can advantageously directly generate the range of voltage required for the VCO or VCXO varactors.
A phase locked loop in accordance with the inventive arrangements comprises: means requiring a control signal having a given bias voltage for generating a clock signal; an integrator for developing the control signal; a source of an external synchronizing signal; first and second voltage sources defining a voltage potential related to the given bias voltage; a first switch coupled to the first and second voltage sources and responsive to the clock signal for developing a regenerated clock signal having a peak to peak voltage determined by the voltage potential; and, a second switch responsive to the external synchronizing signal for periodically sampling portions of the regenerated clock signal and coupling the sampled portions to the to the integrator, the sampled portions charging and discharging the integrator to generate the control voltage with a large enough magnitude to provide the given bias voltage, whereby the clock signal generating means is synchronized to the external synchronizing signal.
The phase locked loop can advantageously further comprise: the integrator developing a first control voltage; a source of a second control voltage; a third switch defining a first switchable path between the integrator and the clock signal generating means, and defining a second switchable path between the source of the second control voltage and the integrator, the first or the second switchable path being closed responsive to a control voltage source selection signal. The first control voltage can be coupled to the clock signal generating means for a phase locked mode of operation and the second control voltage can be coupled to the clock signal generating means for a phase unlocked mode of operation.
The first, second and third switches can advantageously be analog semiconductor switches, and further, can advantageously be embodied in an integrated circuit.
REFERENCES:
patent: 5459756 (1995-10-01), Stilwell et al.
patent: 5796392 (1998-08-01), Eglit
patent: 6091304 (2000-07-01), Harrer
Fairchild Semiconductor—Nov. 1983 Revised Jan. 1999 CD4051BC CD4052BC CD4053BC Single 8-Channel Analog Multiplexer/Demultiplexer. Dual 4-Channel Analog Multiplexer/Demultiple. Dual 4-Channel Analog Multiplexer/Demultiplexer Triple 2-Channel Analog Multiplexer/Demultiplexer.
Altmanshofer Robert Dale
Crabb Michael Evan
Cox Cassandra
Fried Harvey D.
Laks Joseph J.
Thomson Licensing S.A.
Tripoli Joseph S.
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