Phase-change random access memory device and semiconductor...

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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C365S185050, C257S002000

Reexamination Certificate

active

07742332

ABSTRACT:
A semiconductor memory device includes: first and second wiring layers extending in substantially parallel to each other in a first direction; a first semiconductor region formed in a part of a portion between the first and second wiring layers; a second semiconductor region formed on an opposite side to the first semiconductor region with respect to the second wiring layer and making a pair with the first semiconductor region; a third semiconductor region formed in another part of the portion between the first and second wiring layers; a fourth semiconductor region formed on an opposite side to the third semiconductor region with respect to the first wiring layer and making a pair with the third semiconductor region; a third wiring layer extending in a second direction that crosses the first direction and having an electrical contact with the first semiconductor region; a fourth wiring layer extending in the second direction and having an electrical contact with the fourth semiconductor region; a fifth wiring layer extending in the first direction to cross over the first and third semiconductor regions.

REFERENCES:
patent: 6924525 (2005-08-01), Narui et al.
patent: 2005/0270883 (2005-12-01), Cho et al.
patent: 2007/0111429 (2007-05-01), Lung
patent: 2007/0181932 (2007-08-01), Happ et al.
Kang, D.H.,e t al., “Novel Heat Dissipating Cell Scheme for Improving a Reset Distribution in a 512M Phase-change Random Access Memory (PRAM)”, Symposium on VLSI Technology Digest of Technical Papers, 2007, pp. 96-97.

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