Phase change memory dynamic resistance test and...

Details Phase change memory dynamic resistance test and... Phase change memory dynamic resistance test and...

2008-01-07

2009-12-29

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S201000

Reexamination Certificate

active

07639527

ABSTRACT:
A method for testing an integrated circuit memory device includes applying a sequence of test pulses to a memory cell on the device, where the test pulses result in current through the memory cell having an amplitude dependent on the test pulse. Resistance in the memory cell is measured in response to the sequence of test pulses. A parameter set is extracted from the resistance measurements which includes at least one numerical coefficient that models dependency of the measured resistance on the amplitude of the current through the memory cell. The extracted numerical coefficient or coefficients are associated with the memory device, and used for controlling manufacturing operations.

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