Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Reexamination Certificate
2005-08-30
2005-08-30
Ngô, Ngân V. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
C257S485000
Reexamination Certificate
active
06936840
ABSTRACT:
A memory cell and method of fabricating the memory cell includes an insulating layer formed on a first electrode layer, the insulating layer having a first opening, a stencil layer formed on the insulating layer, and having a second opening formed in an area of the first opening, a phase-change material layer formed on a surface of the first electrode layer in the first opening, and an electrically conductive layer including a first portion formed on the stencil layer and defining a second electrode layer and a second portion formed on the phase-change material layer.
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Raoux Simone
Sun Jonathan Zanhong
Wichramasinghe Hemantha
Kaufman, Esq. Stephen C.
McGinn & Gibb PLLC
Ngo Ngan V.
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