Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2011-06-21
2011-06-21
Sofocleous, Alexander (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S149000, C365S189050, C365S189070, C365S193000
Reexamination Certificate
active
07965567
ABSTRACT:
Apparatus and methods are disclosed for adjusting phase of data signals to compensate for phase-offset variations between devices during normal operation. The phase of data signals are adjusted individually in each transmit data unit and receive data unit across multiple data slices with a common set of phase vector clock signals and a corresponding clock cycle count signal. The transmission of signal information between a first device (such as a memory controller) and a second device (such as a memory component) occurs without errors even when the accumulated delays between the first device and second device change by a half symbol time interval or more during operation of the system. The apparatus reduces the circuitry required, such as phase-lock-loops, for individually adjusting the phase of each transmit data unit and receive data unit across multiple data slices, which in turn results in reduction in complexity and cost of the system.
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Hampel Craig E.
Perego Richard E.
Sidiropoulos Stefanos S.
Tsern Ely K.
Ware Fredrick A.
Morgan & Lewis & Bockius, LLP
Rambus Inc.
Sofocleous Alexander
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