Peripheral circuit in a dynamic semiconductor memory device enab

Details Peripheral circuit in a dynamic semiconductor memory device enab Peripheral circuit in a dynamic semiconductor memory device enab

1991-02-20

1994-03-08

Levy, Stuart S.

Static information storage and retrieval

Read/write circuit

Signals

36518909, 365203, 365205, G11C 700

Patent

active

052933385

ABSTRACT:
A peripheral circuit in a dynamic semiconductor memory device has a data line bias circuit and a timing generator circuit. The data line bias circuit has a switch connected between data lines and an internal voltage drop potential line having an intermediate potential between a power supply potential and a ground potential. When the switch is turned on, the data line bias circuit forms a current path connecting the internal voltage drop potential line and the data lines, and this current path is separated from ground. Therefore, electric current does not flow wastefully to ground. The timing generator circuit generates a control signal for activating pull-down transistors in a sense amplifier, a control signal for activating a column address decoder, and a control signal for activating pull-up transistors in the sense amplifier in that order, so that amplification of the signal on the bit lines, transfer of the amplified signal from the bit lines to the data lines, and bit line restoring are performed in that order.

REFERENCES:
patent: 4162540 (1979-07-01), Ando
patent: 4748596 (1988-03-01), Ogura et al.
patent: 4791616 (1988-12-01), Taguchi et al.
patent: 4816706 (1989-03-01), Dhong et al.
patent: 4916671 (1990-04-01), Ichiguchi
patent: 4951256 (1990-08-01), Tobita
patent: 4980862 (1990-12-01), Foss
patent: 5053998 (1991-10-01), Kannan et al.
"Reduction of DRAM Sense Amplifier Peak Current by Preceded PMOS Drive Technique" published in the 70th Anniversary Memorial Nation-Wide Assembly of the Institute of Electronics, Information and Communication Engineers, 1987.

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