Periodic and conditional execution of DMA operations

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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C710S024000

Reexamination Certificate

active

08041847

ABSTRACT:
Scheduling Direct Memory Access (DMA) operations. Blocks are provided in a first DMA chain, with each block in the first DMA chain corresponding to an operation and comprising a pair of pointers, a first pointer pointing to a command structure to be executed or a data structure to be moved, and a second pointer pointing to a next block in the first DMA chain. A DMA engine processes successive operations in the first DMA chain. Time remaining in an interval for processing the first DMA chain is tracked. A second DMA chain of conditional blocks are maintained, with each conditional block corresponding to a conditional operation and containing an estimate of time needed to complete the conditional operation. A conditional operation is executed from the second DMA chain if the remaining time in the interval is greater than the estimated time to complete processing of the conditional operation.

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