Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-10-18
2010-10-05
Lohn, Joshua A (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
07809989
ABSTRACT:
An asymmetric multiprocessor apparatus2is provided in which respective slave diagnostic units20, 22, 24are associated with corresponding execution mechanisms6, 8, 10. A master diagnostic unit26tracks the migration of thread execution between the different execution mechanisms6, 8, 10so that the execution of a given thread can be followed by the diagnostic mechanisms20, 22, 24, 26and this information provided to the programmer. The execution mechanisms6, 8, 10can be diverse such as a general purpose processor6, a DMA unit12, a coprocessor, an VLIW processor, a digital signal processor8and a hardware accelerator10. The asymmetric multiprocessor apparatus2will also typically include an asymmetric memory hierarchy such as including two or more of a global memory, a shared memory16, a private memory18and a cache memory14.
REFERENCES:
patent: 5692193 (1997-11-01), Jagannathan et al.
patent: 6115763 (2000-09-01), Douskey et al.
patent: 6539339 (2003-03-01), Berry et al.
patent: 6748583 (2004-06-01), Aizenbud-Reshef et al.
patent: 6857084 (2005-02-01), Giles
patent: 6862694 (2005-03-01), Tormey et al.
patent: 6941492 (2005-09-01), Ezra et al.
patent: 7080283 (2006-07-01), Songer et al.
patent: 7243264 (2007-07-01), Weber et al.
patent: 7444546 (2008-10-01), Kimelman et al.
patent: 2002/0065864 (2002-05-01), Hartsell et al.
patent: 2003/0115495 (2003-06-01), Rawson, III
patent: 2004/0154027 (2004-08-01), Vandewalle et al.
patent: 2005/0034024 (2005-02-01), Alverson et al.
patent: 2006/0282707 (2006-12-01), Rosenbluth et al.
patent: 2007/0016733 (2007-01-01), Day et al.
patent: 2007/0067771 (2007-03-01), Kulbak et al.
patent: 2007/0250820 (2007-10-01), Edwards et al.
patent: 2008/0108899 (2008-05-01), Halmann et al.
patent: 2009/0313507 (2009-12-01), Swaine et al.
patent: 0 396 833 (1990-11-01), None
patent: 2006/028520 (2006-03-01), None
J. Engblom, “Debugging real-time multiprocessor systems: Part 2, Debugging Parallel Programs” embedded.com Mar. 2006, pp. 1-5.
J. Engblom, “Debugging Real-Time Multiprocessor Systems” Class #264, Embedded Systems Conference, 2006, pp. 1-15.
QNX Software Systems GmbH & Co. KG, “QNX Neutrino RTOS—System Architecture” Feb. 2006, pp. 1-407.
Ford Simon Andrew
Grimley-Evans Edmund
Kneebone Katherine Elizabeth
Reid Alastair David
ARM Limited
Lohn Joshua A
Nixon & Vanderhye P.C.
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