Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-03-30
2003-05-13
Lam, Tuan T. (Department: 2816)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06564357
ABSTRACT:
FIELD
The present invention is directed to performance analysis and verification of full-chip designs.
BACKGROUND
Performance analysis/verification is an aspect of integrated circuit design in which a model of the integrated circuit is tested to determine whether it meets specified performance criteria.
Performance analysis/verification of an integrated circuit chip model may be performed in a hierarchical manner. For example, during a first pass, individual cells of the integrated circuit may be tested against desired performance goals for the individual cells. For subsequent passes, testing may then proceed at the block level and finally, at the full chip level, to determine if the overall chip meets desired performance criteria.
REFERENCES:
patent: 5844818 (1998-12-01), Kochpatcharin et al.
patent: 5901063 (1999-05-01), Chang et al.
patent: 6018623 (2000-01-01), Chang et al.
patent: 6233724 (2001-05-01), LaBerge
patent: 6253358 (2001-06-01), Takahashi
patent: 6272668 (2001-08-01), Teene
patent: 6314546 (2001-11-01), Muddu
patent: 6327693 (2001-12-01), Cheng et al.
Kay Rony
Kurupati Sreenath
Englund Terry L.
Lam Tuan T.
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