Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2001-02-09
2002-04-23
Mulpuri, Savitri (Department: 2812)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
Reexamination Certificate
active
06376339
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to microelectronic devices and fabrication methods, and more particularly to gallium nitride semiconductor devices and fabrication methods therefor.
BACKGROUND OF THE INVENTION
Gallium nitride is being widely investigated for microelectronic devices including but not limited to transistors, field emitters and optoelectronic devices. It will be understood that, as used herein, gallium nitride also includes alloys of gallium nitride such as aluminum gallium nitride, indium gallium nitride and aluminum indium gallium nitride.
A major problem in fabricating gallium nitride-based microelectronic devices is the fabrication of gallium nitride semiconductor layers having low defect densities. It is known that one contributor to defect density is the substrate on which the gallium nitride layer is grown. Accordingly, although gallium nitride layers have been grown on sapphire substrates, it is known to reduce defect density by growing gallium nitride layers on aluminum nitride buffer layers which are themselves formed on silicon carbide substrates. Notwithstanding these advances, continued reduction in defect density is desirable.
It is also known to fabricate gallium nitride structures through openings in a mask. For example, in fabricating field emitter arrays, it is known to selectively grow gallium nitride on stripe or circular patterned substrates. See, for example, the publications by Nam et al. entitled “
Selective Growth of GaN and Al
0.2
Ga
0.8
N on GaN/AlN/N
6
H
-
SiC
(0001)
Multilayer Substrates Via Organometallic Vapor Phase Epitaxy”,
Proceedings of the Materials Research Society, December 1996, and “
Growth of GaN and Al
0.2
Ga
0.8
N on Patterened Substrates via Organometallic Vapor Phase Epitaxy”,
Japanese Journal of Applied Physics., Vol. 36, Part 2, No. 5A, May 1997, pp. L532-L535. As disclosed in these publications, undesired ridge growth or lateral overgrowth may occur under certain conditions.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved methods of fabricating gallium nitride semiconductor layers, and improved gallium nitride layers so fabricated.
It is another object of the invention to provide methods of fabricating gallium nitride semiconductor layers that can have low defect densities, and gallium nitride semiconductor layers so fabricated.
These and other objects are provided, according to the present invention, by masking an underlying gallium nitride layer on a silicon carbide substrate with a mask that includes an array of openings therein and etching the underlying gallium nitride layer through the array of openings to define a plurality of posts in the underlying gallium nitride layer and a plurality of trenches therebetween. The posts each include a sidewall and a top having the mask thereon. The sidewalls of the posts are laterally grown into the trenches to thereby form a gallium nitride semiconductor layer. During this lateral growth, the mask prevents nucleation and vertical growth from the tops of the posts. Accordingly, growth proceeds laterally into the trenches, suspended from the sidewalls of the posts. This form of growth is referred to herein as pendeoepitaxy from the Latin “to hang” or “to be suspended”. Microelectronic devices may be formed in the gallium nitride semiconductor layer.
According to another aspect of the invention, the sidewalls of the posts are laterally grown into the trenches until the laterally grown sidewalls coalesce in the trenches to thereby form a gallium nitride semiconductor layer. The lateral growth from the sidewalls of the posts may be continued so that the gallium nitride layer grows vertically through the openings in the mask and laterally overgrows onto the mask on the tops of the posts, to thereby form a gallium nitride semiconductor layer. The lateral overgrowth can be continued until the grown sidewalls coalesce on the mask to thereby form a continuous gallium nitride semiconductor layer. Microelectronic devices may be formed in the continuous gallium nitride semiconductor layer.
It has been found, according to the present invention, that dislocation defects do not significantly propagate laterally from the sidewalls of the posts, so that the laterally grown sidewalls of the posts are relatively defect-free. Moreover, during growth, it has been found that significant vertical growth on the top of the posts is prevented by the mask so that relatively defect-free lateral growth occurs from the sidewalls onto the mask. Significant nucleation on the top of the posts also preferably is prevented. The overgrown gallium nitride semiconductor layer is therefore relatively defect-free.
Accordingly, the mask functions as a capping layer on the posts that forces the selective homoepitaxial growth of gallium nitride to occur only on the sidewalls. Defects associated with heteroepitaxial growth of the gallium nitride seed layer are pinned under the mask. By using a combination of growth from sidewalls and lateral overgrowth, a complete coalesced layer of relatively defect-free gallium nitride may be fabricated over the entire surface of a wafer in one regrowth step.
The pendeoepitaxial gallium nitride semiconductor layer may be laterally grown using metalorganic vapor phase epitaxy (MOVPE). For example, the lateral gallium nitride layer may be laterally grown using triethylgallium (TEG) and ammonia (NH
3
) precursors at about 1000°-1100° C. and about 45 Torr. Preferably, TEG at about 13-39 &mgr;mol/min and NH
3
at about 1500 sccm are used in combination with about 3000 sccm H
2
diluent. Most preferably, TEG at about 26 &mgr;mol/min, NH
3
at about 1500 sccm and H
2
at about 3000 sccm at a temperature of about 1100° C. and about 45 Torr are used. The underlying gallium nitride layer preferably is formed on a substrate such as 6H-SiC(0001), which itself includes a buffer layer such as aluminum nitride thereon. Other buffer layers such as gallium nitride may be used. Multiple substrate layers and buffer layers also may be used.
The underlying gallium nitride layer including the sidewall may be formed by forming trenches in the underlying gallium nitride layer, such that the trenches define the sidewalls. Alternatively, the sidewalls may be formed by forming masked posts on the underlying gallium nitride layer, the masked posts including the sidewalls and defining the trenches. A series of alternating trenches and masked posts is preferably formed to form a plurality of sidewalls. The posts are formed such that the top surface and not the sidewalls are masked. As described above, trenches and/or posts may be formed by masking and selective etching. Alternatively, selective epitaxial growth, combinations of etching and growth, or other techniques may be used. The mask may be formed on the post tops after formation of the posts. The trenches may extend into the buffer layer and/or into the substrate so that the trench floors are in the buffer layer and preferably are in the silicon carbide substrate.
The sidewalls of the posts in the underlying gallium nitride layer are laterally grown into the trenches, to thereby form a lateral gallium nitride layer of lower defect density than that of the underlying gallium nitride layer. Some vertical growth may also occur in the trenches, although vertical growth from the post tops is reduced and preferably suppressed by the mask thereon. The laterally grown gallium nitride layer is vertically grown through the openings in the mask while propagating the lower defect density. As the height of the vertical growth extends through the openings in the mask, lateral growth over the mask occurs while propagating the lower defect density to thereby form an overgrown lateral gallium nitride layer on the mask.
Gallium nitride semiconductor structures according to the invention comprise a silicon carbide substrate and a plurality of gallium nitride posts on the silicon carbide substrate. The posts each include a sidewall and a top and define a plurality of trenches therebetween. A capping layer is p
Carlson Eric P.
Davis Robert F.
Gehrke Thomas
Linthicum Kevin J.
Rajagopal Pradeep
Mulpuri Savitri
Myers Bigel & Sibley & Sajovec
North Carolina State University
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