Electronic digital logic circuitry – Signal sensitivity or transmission integrity
Patent
1995-10-31
1996-07-30
Westin, Edward P.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
326121, 327171, H03K 1716
Patent
active
055415270
ABSTRACT:
A PECL buffer produces a PECL differential signal pair given a single-ended input signal. The buffer does not introduce any phase mismatch and thus no skew to the differential signal pair. Because no phase mismatch exists between the differential signal pair, the present invention is especially suited for high speed systems and circuits. The buffer also allows the differential signal pair to respond continuously to changes in the single-ended input signal.
REFERENCES:
patent: 4283639 (1981-08-01), Roesler
patent: 5047659 (1991-09-01), Ulrich
patent: 5130566 (1992-07-01), Nguyen
patent: 5140174 (1992-09-01), Meier
Jorgenson Lisa K.
Larson Renee M.
Sanders Andrew
SGS-Thomson Microelectronics Inc.
Westin Edward P.
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