PCI-X error correcting code (ECC) pin sharing configuration

Details PCI-X error correcting code (ECC) pin sharing configuration PCI-X error correcting code (ECC) pin sharing configuration

2007-09-11

2007-09-11

Lee, Christopher E. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S104000, C710S316000, C714S001000

Reexamination Certificate

active

11151317

ABSTRACT:
A method is provided for utilizing four error correcting code (ECC) pin connections of a PCI/PCI-X bus for one of Grant (GNT) and Request (REQ) pin connections. The method determines a mode of the PCI bus to be PCI-X Mode 1, PCI-X Mode 2, or PCI. If the determined mode is PCI-X Mode 2, the four ECC pin connections are used as ECC pin connections, and if the determined mode is PCI or PCI-X Mode 1, each of the four ECC pin connections is used as a GNT pin connection or a REQ pin connection.

REFERENCES:
patent: 5974573 (1999-10-01), Martin
patent: 6915446 (2005-07-01), Riley
patent: 7043656 (2006-05-01), Riley
patent: 7139965 (2006-11-01), Shah et al.
patent: 2004/0237018 (2004-11-01), Riley
patent: 2005/0229132 (2005-10-01), Butt et al.
“AMD-3181™ HyperTransport™ PCI-X® Tunnel Data Sheet”, 24637 Rev. 3.02, Aug. 10, 2004, pp. 1-87.

Affiliated with

Also associated with

Rating

PCI-X error correcting code (ECC) pin sharing configuration does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with PCI-X error correcting code (ECC) pin sharing configuration, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and PCI-X error correcting code (ECC) pin sharing configuration will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3751591