PCI-X 2.0 receiver with initial offset for biased idle...

Details PCI-X 2.0 receiver with initial offset for biased idle... PCI-X 2.0 receiver with initial offset for biased idle...

2005-03-22

2005-03-22

Vo, Tim (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Protocol

C326S030000

Reexamination Certificate

active

06871249

ABSTRACT:
A receiver with initial offset for biased idle transmission line suitable for providing a programmable amount of initial offset. The receiver comprises a standard differential receiver and one or more initial offset modules. Each initial offset module includes a transistor and two or more switches, which control the amount of offset to the differential receiver. A first switch receives a digital signal, which programs the amount of offset and a complementary digital signal is sent to a second switch to control the addition of the selected initial offset module(s).

REFERENCES:
patent: 5430396 (1995-07-01), Morano
patent: 5585741 (1996-12-01), Jordan
patent: 5942809 (1999-08-01), Hashimoto
patent: 6084424 (2000-07-01), Gasparik
patent: 6243817 (2001-06-01), Melo et al.
patent: 6281731 (2001-08-01), Fifield et al.

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