PCI express link state management system and method thereof

Details PCI express link state management system and method thereof PCI express link state management system and method thereof

2006-05-09

2009-10-20

Lee, Thomas (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Reexamination Certificate

active

07607029

ABSTRACT:
A PCI Express link state management system and method thereof is disclosed. The PCI Express link power state management system includes an upstream device, a downstream device and a link. First, the upstream device outputs a configuration request to the downstream device so as to change a device power state of the downstream device. At the time, the link is in a first link state. Next, the downstream device outputs a power entering signal to the upstream device. Following that, the upstream device outputs a power request acknowledging signal to the downstream device in response to the power entering signal and a time period is counting. Finally, the downstream device re-outputs the power entering signal if the link does not enter to an electrical idle state when the time period is expired.

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