PCI express enhancements and extensions

Electrical computers and digital processing systems: support – Computer power control

Reexamination Certificate

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Details

C713S320000, C710S104000, C710S105000, C710S305000

Reexamination Certificate

active

07930566

ABSTRACT:
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

REFERENCES:
patent: 7366921 (2008-04-01), Ranganathan
patent: 7441128 (2008-10-01), Ho et al.
patent: 7467313 (2008-12-01), Han et al.
patent: 7539809 (2009-05-01), Juenger
patent: 2006/0179195 (2006-08-01), Sharma et al.
patent: 2007/0245046 (2007-10-01), Asaro et al.

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