PCI bus arbiter and a bus control system having the same

Details PCI bus arbiter and a bus control system having the same PCI bus arbiter and a bus control system having the same

1997-01-30

1999-10-19

Sheikh, Ayaz R.

395728, 395731, 395308, G06F 1336, G06F 1337

Patent

active

059702346

ABSTRACT:
A PCI bus arbiter is provided as an additional PCI bus in PCI peer-to-peer bus bridge system. A bus control system having the PCI bus arbiter is also provided. The bus control system includes bus masters, a first PCI bus bridge, a second PCI bus bridge, an EISA/ISA bus bridge for changing structures of signals from the bus masters to be suitable for corresponding bus, a first arbiter in a main chip set, and a second arbiter for arbitration process. The second arbiter includes an edge detecting state machine which detects whether a PCI bus is accessed by a bus master, and produces a frame-signal which changes a logic state thereof according to an access condition of the PCI bus. The second arbiter may also include a priority resolve state machine which receives the frame-signal and produces priority values which determine an order of bus masters to use the PCI bus, wherein the priority values are changed according to the frame-signal. The second arbiter can include a hand shake state machine which produces and outputs grant-signals to grant authority to use the PCI bus to bus masters according to the priority value.

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Bit 3 Computer Corporation, Product Summary, Jan. 1997, pp. 6 and 7 including cover page.

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