Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1997-10-20
2001-07-17
Dharia, Rupal (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S008000, C710S011000, C710S012000, C710S062000, C710S063000, C710S120000, C710S120000
Reexamination Certificate
active
06263385
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to computer systems, and, more particularly, to the partitioning of a parallel port among integrated circuits.
2. Description of the Related Art
A typical personal computer (PC) system includes a microprocessor, associated memory and control logic and a number of peripheral devices that provide input and output for the system. Such peripheral devices typically include a display monitor, a keyboard and mouse, a floppy disk drive, a hard disk drive and a printer. The number of devices being added to personal computer systems continues to grow. For example, many computer systems also include modems, sound devices, and CD-ROM drives.
PC systems use one of several expansion bus architectures to facilitate communication between various components of the system and to provide the versatility needed to add additional components to the system. For example, Industry Standard Architecture (ISA) provides an expansion bus for the 16-bit IBM AT personal computer. The Enhanced ISA (EISA) provide specifications for systems utilizing 32-bit microprocessors such as the Intel 80386 and 80486 microprocessors. The Peripheral Component Interconnect (PCI) bus provides a bus architecture for 32-bit or 64-bit interconnection systems independent of processor generation or family.
The ISA bus, originally called the Advanced Technology (AT) bus, added the functionality needed for full 16-bit technology, but maintained compatibility with an older 8-bit PC bus. Because of its initial speed and data-path match with the 80286 microprocessor, the original ISA bus substantially out-performed the PC bus. The ISA bus has resisted replacement by newer bus architectures such as EISA and Microchannel, and remains commonplace in personal computer systems in use today. This is true in part because many devices that are designed to interface with the ISA bus are in widespread use today. Such devices typically do not require the higher speed provided by the newer buses. Such devices are known as legacy devices since their design is based on older PC technology. Examples of such slower legacy devices include keyboards, and mouse(s), game ports, and floppy drives, modems and printers connected respectively to serial and parallel communication ports, direct memory access (DMA) controllers, interrupt controllers and timers. Those legacy devices do not need the high speed throughput of the newer generation of buses such as EISA, Microchannel Architecture (MCA) and the Peripheral Component Interface (PCI) bus.
Although personal computer system speeds have increased dramatically, the speed of the ISA bus is limited to 8 MHz. As higher speed processors were utilized, dedicated memory buses were added to personal computer systems because the ISA bus was too slow for the required high speed memory accesses. Video applications also became limited by the bandwidth of the ISA, so systems began to use a “local bus” for video applications. Although initially targeted at advanced video systems, new local bus specifications were made broad enough for handling other peripherals requiring high-bandwidth transfers such as mass storage devices and network interfaces.
The Peripheral Component Interconnect (PCI) bus is one example of a local bus specification. The VL bus is another local bus specification that has been less widely adopted. The PCI bus provides a high-speed interconnection system which runs more closely to microprocessor speeds than does a traditional expansion bus. And, although initially designed for 32-bit microprocessors, the PCI specification is broad enough to include the 64 bit data paths of the advanced processors. Legacy devices compatible with older bus architectures such as ISA connect to the PCI bus via a bus bridge circuit.
Many present day personal computer systems contain both a PCI bus and an ISA bus. The PCI bus is used to connect to newer peripherals and/or those peripherals requiring a higher speed interface. The ISA bus is typically connected to legacy devices. Historically, interfaces to peripherals utilized a large number of discrete components. However, the levels of integration has continued to increase in PC systems. As a result, much of the functional logic which is required to interface with peripheral devices has been integrated into a relatively few integrated circuits (ICs) which are sold as chip sets for the PC. The ICs include a plurality of terminals, pins, or leads, connecting the IC to the printed circuit board (PCB) to which the IC is mounted. The PCB functions as a system board. The terminals communicate input/output (I/O) signals between one IC and other ICs or I/O devices coupled to the system board. These system boards often receive expansion PCBs to increase the capabilities of the computer system and to connect to peripheral devices, e.g., through the ISA bus.
Referring, to
FIG. 1
, an exemplary prior art computer system
100
is shown conforming to the above architectural approach of including both a PCI bus and an ISA bus. Computer system
100
includes processor
110
which is coupled to secondary cache
115
and memory
140
. Bridge
120
provides an interface between the processor/memory system
105
and PCI bus
125
. Bridge
120
provides a communication link between PCI devices
150
,
160
and
165
and the processor/memory system
105
. In fact, although the PCI bus was originally intended for graphics, high speed graphics requirements have resulted in another specialized graphics bus called the Advanced Graphics Port Bus which can be utilized in place of the PCI bus for graphics applications. The PCI devices may be integrated circuits on the system board of computer system
100
, expansion components connected to PCI bus
125
via expansion slots, or some combination thereof. A second bridge
130
, provides abus interface between the PCI bus
125
the ISA expansion bus
135
. In order to communicate with legacy devices which are designed to interface to the ISA bus, one approach, consistent with the trend towards increased integration in the PC, has been to provide Super I/O chip
170
rather than provide a number of discrete interfaces.
Super I/O chip
170
provides I/O terminals and control logic for commonly used legacy peripheral devices such as keyboards, IDE drive, IEEE parallel port, serial communication ports. One example of such a Super I/O chip is the National Semiconductor PC87306 Super I/O chip. Thus, legacy devices can be included in the system by utilizing the bridge
130
, the ISA bus, and Super I/O chip
170
.
SUMMARY OF THE INVENTION
It has been discovered to combine a bridge function such as a PCI bridge with a Super I/O function in a first integrated circuit. Further, it has been discovered to provide in the first integrated circuit logic for a parallel port to interface with an input/output bus and a second integrated circuit that provides logic and input/output terminals to interface with a parallel port.
Accordingly, the invention provides a first and second integrated circuit containing respectively a first and second portion of a parallel port, the first portion includes control, configuration, data and status registers and the second portion includes parallel port input and output terminals. A bus couples the first and second integrated circuits and transfers parallel port control and data information between the first and second integrated circuits. The bus includes a clock line providing a clock signal. A first port data out line provides first data from the first to the second integrated circuit. The first data includes a plurality of first data bits, each of the first data bits being synchronous with the clock signal. The first data includes data bits to be provided to the parallel port output terminals. A first port data in line provides second data from the second to the first integrated circuit. The second data includes a plurality of second data bits which are synchronous with the clock signal. The second data includes data bits indicating a state of the in
Gulick Dale E.
Suggs David Neal
Advanced Micro Devices , Inc.
Dharia Rupal
Zagorin O'Brien & Graham LLP
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