Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-04-21
2008-08-05
Pham, Thanh Van (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S445000, C438S669000, C438S942000, C438S947000, C216S012000, C216S041000, C216S042000, C216S043000, C977S887000, C257SE21017, C257SE21018, C257SE21240, C257SE21249
Reexamination Certificate
active
07407890
ABSTRACT:
A method of processing a substrate of a device comprises the as following steps. Form a cap layer over the substrate. Form a dummy layer over the cap layer, the cap layer having a top surface. Etch the dummy layer forming patterned dummy elements of variable widths and exposing sidewalls of the dummy elements and portions of the top surface of the cap layer aside from the dummy elements. Deposit a spacer layer over the device covering the patterned dummy elements and exposed surfaces of the cap layer. Etch back the spacer layer forming sidewall spacers aside from the sidewalls of the patterned dummy elements spaced above a minimum spacing and forming super-wide spacers between sidewalls of the patterned dummy elements spaced less than the minimum spacing. Strip the patterned dummy elements. Expose portions of the substrate aside from the sidewall spacers. Pattern exposed portions of the substrate by etching into the substrate.
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Yang-Kyu Choi, Tsu-Jae King, and Chenming Hu, “A Spacer Patterning Technology for Nanoscale CMOS” IEEE Transactions on Electron Devices, vol. 49, No. 3, Mar. 2002.
International Business Machines - Corporation
Pham Thanh Van
Schnurmann H. Daniel
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