Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Reexamination Certificate
2007-06-26
2007-06-26
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
C438S401000, C438S975000, C216S054000, C216S044000, C216S052000
Reexamination Certificate
active
10485419
ABSTRACT:
The invention relates to a method for creating a pattern on a substrate comprising a first alignment structure, using an elastomeric stamp comprising a patterning structure and a second alignment structure. The method comprises a moving step for moving the elastomeric stamp towards the substrate, and a deformation step for deforming the patterning structure with a tensile or compressive force generated by cooperation of the first alignment structure and the second alignment structure.
REFERENCES:
patent: 5772905 (1998-06-01), Chou
patent: 6482742 (2002-11-01), Chou
patent: 6656398 (2003-12-01), Birch et al.
patent: 6966997 (2005-11-01), Inganas et al.
patent: 7026012 (2006-04-01), Chen et al.
patent: 7117790 (2006-10-01), Kendale et al.
Biebuyck Han
Bona Gian-Luca
Michel Bruno
Rothuizen Hugo Eric
Vettiger Peter
International Business Machines - Corporation
Thai Luan
Trepp Robert M.
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