Patterning method

Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S401000, C438S975000, C216S054000, C216S044000, C216S052000

Reexamination Certificate

active

10485419

ABSTRACT:
The invention relates to a method for creating a pattern on a substrate comprising a first alignment structure, using an elastomeric stamp comprising a patterning structure and a second alignment structure. The method comprises a moving step for moving the elastomeric stamp towards the substrate, and a deformation step for deforming the patterning structure with a tensile or compressive force generated by cooperation of the first alignment structure and the second alignment structure.

REFERENCES:
patent: 5772905 (1998-06-01), Chou
patent: 6482742 (2002-11-01), Chou
patent: 6656398 (2003-12-01), Birch et al.
patent: 6966997 (2005-11-01), Inganas et al.
patent: 7026012 (2006-04-01), Chen et al.
patent: 7117790 (2006-10-01), Kendale et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Patterning method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Patterning method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Patterning method will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3860894

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.