Patterning method

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C438S197000, C438S513000, C438S622000, C257SE21014, C257SE21027, C257SE21051, C257SE21058, C257SE21077, C257SE21231, C257SE21259, C257SE21267, C257SE21278, C257SE21293, C257SE21311, C257SE21492

Reexamination Certificate

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07989354

ABSTRACT:
Disclosed is a patterning method including: forming a first film on a substrate; forming a first resist film on the first film; processing the first resist film into a first resist pattern having a preset pitch by photolithography; forming a silicon oxide film on the first resist pattern and the first film by alternately supplying a first gas containing organic silicon and a second gas containing an activated oxygen species to the substrate; forming a second resist film on the silicon oxide film; processing the second resist film into a second resist pattern having a preset pitch by the photolithography; and processing the first film by using the first resist pattern and the second resist pattern as a mask.

REFERENCES:
patent: 6365428 (2002-04-01), Zubrzycki et al.
patent: 7151039 (2006-12-01), Lee
patent: 7736926 (2010-06-01), Yagi
patent: 2007/0253456 (2007-11-01), Yagi
patent: 04196321 (1992-07-01), None
patent: 09205081 (1997-08-01), None
patent: 2004080033 (2004-03-01), None
patent: 10-2004-0016779 (2004-02-01), None
International Search Report for PCT/JP2008/060482 dated Jul. 1, 2008.
Korean Office action for 10-2011-7004101 dated Apr. 5, 2011.

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