Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2011-05-10
2011-05-10
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S282000, C257SE21122
Reexamination Certificate
active
07939387
ABSTRACT:
A process for treating a structure to prepare it for electronics or optoelectronics applications. The structure includes a bulk substrate, an oxide layer, and a semiconductor layer, and the process includes providing a masking to define on the semiconductor layer a desired pattern, and applying a thermal treatment for removing a controlled thickness of oxide in the regions of the oxide layer corresponding to the desired pattern to assist in preparing the structure.
REFERENCES:
patent: 5691231 (1997-11-01), Kobayashi et al.
patent: 6300218 (2001-10-01), Cohen et al.
patent: 6846727 (2005-01-01), Fogel et al.
patent: 6955971 (2005-10-01), Ghyselen et al.
patent: 2005/0118789 (2005-06-01), Aga et al.
patent: 2006/0051945 (2006-03-01), Yokokawa et al.
patent: 2006/0154442 (2006-07-01), De Souza et al.
patent: 2008/0102603 (2008-05-01), Kobayashi et al.
patent: 2 847 007 (2004-05-01), None
patent: 2000/036445 (2000-02-01), None
patent: 2006/049725 (2006-02-01), None
International Search Report and Written Opinion for PCT/IB2007/051435, 2007.
O. Kononchuk et al.,Internal Dissolution of Buried Oxide in SOI Wafers, 2008, pp. 113-118, Solid State Phenomena, vols. 131-133, Trans Tech Publications, Switzerland.
J. Sullivan et al.,High Temperature Oxygen Out-Diffusion From the Interfacial SiOx Bond Layer in Direct Silicon Bonded(DSB)Substrates, Oct. 2006, IEEE 2006 International SOI Conference, Niagara Falls, NY, Silicon Genesis Corp., California.
K.Y. Ahn et al.,Stability of Interfacial Oxide Layers During Silicon Wafer Bonding, Jan. 15, 1989, pp. 561-563, J. Appl. Physics, No. 65, vol. 2 © 1988 American Institute of Physics.
A. Misiuk, XP004414254,Effect of High Temperature—Pressure on SOI Structure, Sep. 2002, pp. 155-161, Crystal Engineering, vol. 5, Nos. 3-4 © 2003 Elsevier Science Ltd., Barking , Great Britain.
Chaudhari Chandra
S.O.I.Tec Silicon on Insulator Technologies
Winston & Strawn LLP
LandOfFree
Patterned thin SOI does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Patterned thin SOI, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Patterned thin SOI will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2700978