Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Implanting to form insulator
Reexamination Certificate
2002-02-21
2003-07-15
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Implanting to form insulator
C438S440000, C438S520000, C438S526000, C438S528000, C438S766000
Reexamination Certificate
active
06593205
ABSTRACT:
DESCRIPTION
Field of the Invention
The present invention relates to silicon-on-insulator (SOI) substrates for semiconductor integrated circuits (ICs), and more particularly to a method of fabricating an SOI substrate which includes at least one patterned buried oxide (BOX) region which has well defined edges that are suitable for sub-micron geometries.
Background of the Invention
Separation by implantation of oxygen (SIMOX) is a technique employed in the semiconductor industry in fabricating SOI substrates that can be used in the manufacturing of ICs. SIMOX typically involves using high-energy ions to implant a large dose of oxygen ions beneath the surface of a bulk Si-containing wafer. Upon high-temperature annealing, the implanted oxygen ions form a continuous BOX region which electrically isolates the Si at the surface (i.e., superficial Si layer). Typically, prior art SIMOX processes have been used to fabricate SOIs with a superficial Si layer and a BOX thickness of several thousand angstroms.
In some applications, it is desirable to form discrete and isolated BOX regions within a Si-containing substrate while not forming BOX regions in other portions of the same Si-containing substrate. Hence, there is a growing need for providing patterned SOI regions. Patterned SOI regions formed within a Si-containing substrate are especially needed for future high performance Si-containing ICs, optical communication devices and three-dimensional device and circuit integration.
Despite this need, there are many challenges in fabricating patterned SOI regions within a Si-containing substrate. For example, the following criteria needs to be met:
(i) maintaining a smooth surface topology between the patterned and unpatterned regions;
(ii) controlling and eliminating crystallographic defects at the edge of the mask used during ion implantation to create patterned regions; and
(iii) controlling and eliminating crystal defects between the nearby buried oxide islands.
In addition to the above criteria, it is necessary for future generation of ICs to provide SOI substrates that have very fine geometries (on the order of a micron or less) associated therewith. In particular, fine geometries are needed in some applications especially in instances wherein the buried oxide region is employed as a diffusion barrier for most dopants in Si. A BOX region under a gate and extension regions of a field effect transistor (FET) also suppresses the infringing field from the drain region during high operating voltages.
In view of the above, there is a continued need for providing a new and improved method of fabricating SOI substrates that have at least one patterned buried oxide (BOX) region which has well defined edges that are suitable for sub-micron geometries.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a method of forming at least one patterned BOX, i.e., at least one discrete and isolated oxide island, within a Si-containing substrate.
Another object of the present invention is to provide a method of forming at least one patterned BOX region within a Si-containing substrate wherein the at least one patterned BOX region has well defined edges that are suitable for sub-micron geometries. The term “well defined” is used herein to denote a BOX region whose edges are substantially smooth and free of crystal defects.
A further object of the present invention is to provide a method of forming at least one patterned BOX region within a Si-containing substrate wherein the method essentially controls and eliminates crystal defects between nearby oxide islands, i.e., between the discrete buried oxide (BOX) regions.
A still further object of the present invention is to provide a method of forming an SOI substrate having at least one patterned BOX region which extends the scalability of complementary metal oxide semiconductor (CMOS) devices to 0.05-0.1 micron channel lengths.
These and other objects and advantages are achieved in the present invention by utilizing a method wherein the at least one patterned BOX region is formed utilizing various ion implantation steps which includes at least one ion implantation step that selectively annihilates portions of a previously implanted region.
In accordance with the present invention, the ion implantation step that selectively annihilates portions of a previously implanted region comprises the use of ions that are non-soluble in SiO
2
. The non-soluble ions function to create damage and a buried chemical environment that prevents the formation of a buried oxide region during a subsequent annealing process.
In broad terms the inventive method comprises the steps of:
(a) implanting first ions into a surface of a Si-containing substrate so as to form an implant region of said first ions in said Si-containing substrate;
(b) selectively implanting second ions that are insoluble in SiO
2
into portions of said Si-containing substrate, said second ions are capable of preventing said implant region of first ions from forming an oxide region during a subsequent annealing step; and
(c) annealing said Si-containing substrate, wherein said annealing causes formation of a buried oxide region in said implant region of first ions that does not include said second ions.
In one embodiment, the method of the present invention comprises the steps of:
(a) implanting first ions into a surface of a Si-containing substrate so as to form an implant region of said first ions in said Si-containing substrate;
(b) forming a patterned mask on said surface of said Si-containing substrate;
(c) implanting second ions that are insoluble in SiO
2
into said Si-containing substrate not containing said patterned mask, said second ions are capable of preventing said implant region of first ions from forming an oxide region during a subsequent annealing step;
(d) removing said patterned mask; and
(e) annealing said Si-containing substrate, wherein said annealing causes formation of a buried oxide region in said implant region of first ions that does not include said second ions.
In another embodiment, the method of the present invention comprises the steps of:
(a) implanting first ions into a surface of a Si-containing substrate so as to form an implant region of said first ions in said Si-containing substrate;
(b) forming a patterned mask on said surface of said Si-containing substrate;
(c) implanting second ions that are insoluble in SiO
2
into said Si-containing substrate not containing said patterned mask, said second ions are capable of preventing said implant region of first ions from forming an oxide region during a subsequent annealing step;
(d) annealing said Si-containing substrate, wherein said annealing causes formation of a buried oxide region in said implant region of first ions that does not include said second ions; and
(e) removing said patterned mask.
REFERENCES:
patent: 5702957 (1997-12-01), Padmanabhan
patent: 6222253 (2001-04-01), Sadna et al.
patent: 6300218 (2001-10-01), Cohen et al.
Chen Tze-chiang
Sadana Devendra K.
Scully Scott Murphy & Presser
Trepp Robert M.
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