Patterned recess formation using acid diffusion

Semiconductor device manufacturing: process – Including control responsive to sensed condition – Optical characteristic sensed

Reexamination Certificate

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C438S704000

Reexamination Certificate

active

06221680

ABSTRACT:

DESCRIPTION
1. Field of the Invention
The present invention relates to a method of fabricating a patterned semiconductor structure and, more particularly, to a method of recessing filled material within a previously recessed area of a semiconductor structure, e.g. a trench of a dynamic access memory (DRAM) chip, so as to leave a predetermined amount of said filled material within the previously recessed area. The method of the present invention which utilizes an acid diffusion step to recess the material within the previously recessed area is capable of providing a structure which is recessed equally everywhere, recessed in some areas only or recessed to different depths on different parts of the structure.
2. Background of the Invention
Generally, a semiconductor memory device such as a dynamic random access memory (DRAM) chip comprises a plurality of memory cells which are used to store a large quantity of information. Each memory cell includes a capacitor for storing electric charge and a field effect transistor for opening and closing charge and discharge passages of the capacitor. The number of bits on DRAM chips has been increasing by approximately 4× every three years; this has been achieved by reducing the cell size. Unfortunately, the smaller cell size also results in less area to fabricate the capacitor.
As the semiconductor industry moves to smaller and smaller geometries and densities, there is a greater need to switch to vertical structures. This is especially apparent in DRAM development. The trench storage was first introduced with the 4 Mb generation. Since then more and more work has been carried out inside the trench of DRAM cells. A key processing step in trench development is referred to in the art as “recessing”. In recessing, a dry or wet chemical etch processis employed to remove material from inside the trench to a predetermined amount.
A major limitation of prior art recessing processes is that they non-selectively remove the material inside of all of the trenches at once. Thus, it is quite hard to provide DRAM chips that contain trenches recessed to different levels or DRAM chips that are recessed in one portion of the wafer while other parts are left unrecessed. Moreover, the prior art recessing processes are normally very sensitive to chemical loading and aspect ratios; therefore recessing of all the trenches are done unmasked at the same time, and uniformity is usually poor.
In view of the drawbacks mentioned with prior art recessing processes, there is a continued need to develop a new recessing process which is highly efficient and uniform, yet is able to selectively remove material within some of the trenches while leaving material in other trenches unrecessed. Such a method would make it possible to fabricate DRAM chips containing trenches that are recessed in some areas of the chip whereas other trenches in the chip are left unrecessed. Additionally, there is a need to develop a method which is capable of recessing all of the trenches within a DRAM chip to different depths.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a recess etch process which is independent of prior art etch loading problems.
A further object of the present invention is to provide a process for selectively recessing material within a previously recessed area of a semiconductor structure, e.g. a trench of a DRAM chip, so as to leave material remaining, i.e. unrecessed, in one portion of the semiconductor structure while recessing material in other portions of the semiconductor structure.
Another object of the present invention is to provide a process for selectively recessing material within a previously recessed area of a semiconductor structure, e.g. a trench of a DRAM chip, so that said semiconductor structure, i.e. DRAM chip, contains recessed areas, i.e. trenches, that have various recessed depths.
Both of the above processes are accomplished with a high degree of uniformity.
These and other aspects can be achieved in the present invention by using a processing step that includes the diffusion of an acid source through the structure such that said acid source is capable of recessing the material used to fill the recessed areas, i.e. trenches, in one portion of the semiconductor structure while leaving other recessed areas within the structure unrecessed. Specifically, the method of the present invention comprises the steps of:
(a) filling a recessed area of a semiconductor structure containing a conformal layer therein with an acid sensitive material;
(b) subjecting the structure of step (a) to an acid source which is capable of selectively activating the acid sensitive material; and
(c) developing the activated acid sensitive material.
In an alternative embodiment of the present invention, a photoresist is deposited on top of the acid sensitive material after step (a). When such an embodiment is employed, some areas of the photoresist located on top of the acid sensitive material are exposed and developed while other areas of the photoresist are left undeveloped and thus remain on top of the acid sensitive material. The structure provided is then subjected to steps (b) and (c) above whereby step (c) further includes a step of stripping the previously undeveloped photoresist.
It is noted'that in the above embodiment wherein a photoresist is employed, the thickness of the photoresist is sufficient to block acid diffusion thereby not activating the acid sensitive material. The term “activating” is used herein to denote that the acid source substantially changes the acid sensitive material from an insoluble material to a material which is soluble in common developer solutions. If the thickness of the photoresist is too thin, recessing will occur through the structure but to varying depths.
In another alternative embodiment of the present invention, a resist—resist barrier layer is employed between the photoresist and the acid sensitive material to eliminate problems with poisoning and intermixing. When such a barrier is employed the method of the present invention comprises the steps of:
(a) filling a recessed area of a semiconductor structure containing a conformal layer therein with an acid sensitive material, wherein said acid sensitive material is not photosensitive to light in step (d) below;
(b) applying a resist—resist barrier layer on top of said acid sensitive material;
(c) depositing a photoresist on top of said resist—resist barrier layer;
(d) exposing and developing some areas of said photoresist while leaving other areas of said photoresist undeveloped and thus on top of said resist—resist barrier layer;
(e) subjecting the structure provided by step (d) to an acid source which is capable of selectively activating some of the acid sensitive material; and
(f) stripping the remaining photoresist, etching the resist—resist barrier layer, and developing the activated acid sensitive material.


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