Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-04-25
2006-04-25
Luu, Chuong Anh (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S638000, C438S640000
Reexamination Certificate
active
07033925
ABSTRACT:
A mask pattern (110) of a pattern transfer mask (101) includes a light shielding pattern (111) and a light transmitting pattern (112). The light shielding pattern (111) has a shape (pattern) subjected to undersizing near portions corresponding to via holes (51H). It is desirable to make undersizing to a greater degree in a region where the via holes (51H) occupy a larger area. While the mask (101) is intended for a negative-type resist, the light shielding pattern (111) and the light transmitting pattern (112) may be changed in position with each other in a mask intended for a positive-type resist.
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patent: 6656644 (2003-12-01), Hasegawa et al.
patent: 8-44038 (1996-02-01), None
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patent: 2000-58647 (2000-02-01), None
I-Hsiung Huang, et al, “A Novel Multiple Resist Patterning Stacks for Dual Damascene Interconnection and Resolution-Enhanced Patterns”, Proceedings of SPIE, vol. 4346, 2001, pp. 265-275.
Luu Chuong Anh
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Renesas Technology Corp.
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