Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-10-30
2009-02-17
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C257S499000
Reexamination Certificate
active
07493582
ABSTRACT:
A transistor layout including a diffusion region and a gate line. The gate line intersects part of the diffusion region in an overlapping manner. The layout includes an L-shaped bent portion included in the diffusion region. An auxiliary pattern is included in the diffusion region opposite to the L-shaped bent portion so that the gate line is located between the L-shaped bent portion and the auxiliary pattern. The auxiliary pattern and the L-shaped bent portion are spaced from the gate line by the same distance.
REFERENCES:
patent: 5847421 (1998-12-01), Yamaguchi
patent: 5850093 (1998-12-01), Tarng et al.
patent: 6194252 (2001-02-01), Yamaguchi
patent: 6235575 (2001-05-01), Kasai et al.
patent: 2001/0009291 (2001-07-01), Miles
patent: 2002/0079551 (2002-06-01), Hokazono
patent: 2004/0235229 (2004-11-01), Hokazono
patent: 2006/0006437 (2006-01-01), Song et al.
patent: 2007/0257331 (2007-11-01), Kurjanowicz et al.
patent: 60-202343 (1985-10-01), None
patent: 62052974 (1987-03-01), None
patent: 64-053575 (1989-03-01), None
patent: 02309665 (1990-12-01), None
patent: 07142726 (1995-06-01), None
patent: 08078684 (1996-03-01), None
patent: 10200097 (1998-07-01), None
patent: 2000040758 (2000-02-01), None
patent: 2002305302 (2002-10-01), None
patent: 2004342730 (2004-12-01), None
Fujitsu Limited
Fujitsu Patent Center
Kik Phallaka
LandOfFree
Pattern layout and layout data generation method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Pattern layout and layout data generation method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pattern layout and layout data generation method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4065993