Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-03-18
2008-03-18
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07346882
ABSTRACT:
A pattern forming method includes the steps of checking a wide range size change characteristic for each device in a case of using a device group used for forming a pattern; dividing a design pattern size into a smaller area than a standard distance to which a predetermined size change is caused, when the pattern is formed on a sample by using the device group; acquiring correction information of the size of the pattern of each the small area by using the size change characteristic; and forming a desired pattern based on the acquired correction information.
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Chiang Jack
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Tat Binh
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