Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Reexamination Certificate
2004-12-20
2009-08-11
Talbot, Brian K (Department: 1792)
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
C427S008000, C427S097100, C427S256000
Reexamination Certificate
active
07572481
ABSTRACT:
A pattern forming method, for laminating a layer of a pattern on a base by supplying to the base a material for forming the pattern from a supply section for supplying the material based on information of the pattern, comprises the step of adjusting a relative positional relation between a forming surface to which the layer of the pattern is formed and the supply section with respect to a direction in which the pattern is laminated, by using the information.
REFERENCES:
patent: 6561607 (2003-05-01), Lubinsky et al.
patent: 6758550 (2004-07-01), Ito et al.
patent: 6815001 (2004-11-01), Mishima et al.
patent: 1-303787 (1989-12-01), None
patent: 2-162789 (1990-06-01), None
patent: 4-223390 (1992-08-01), None
patent: 5-211383 (1993-08-01), None
patent: 8-80655 (1996-03-01), None
Shinkai Michinori
Suzuki Satoshi
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Talbot Brian K
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