Pattern forming method and method of manufacturing thin film...

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S316000, C430S317000, C430S318000, C430S323000, C430S324000

Reexamination Certificate

active

06670104

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a pattern forming method, and more particularly to a method of manufacturing a thin film transistor (TFT) used in a liquid crystal display device and a method of forming a pattern thereof.
2. Description of the Related Art
In an active matrix substrate for a liquid crystal display device, inverted staggered type TFTs are generally used. In manufacturing of this active matrix substrate for a liquid crystal display device, it is currently necessary to perform a photolithography process five times (hereinafter referred to as photolitho process).
In this active matrix substrate for a liquid crystal display device (for example, TFT structure), the number of manufacturing processes is less than that in a semiconductor integrated circuit. However, in the conventional technique used in manufacturing the active matrix substrate for a liquid crystal display device, it is necessary to perform the photolitho process at least five times. This has been a factor for increasing the manufacturing cost. Thus, it is essential to reduce the number of photolitho processes for manufacturing the active matrix substrate for a liquid crystal display device.
In order to reduce this manufacturing processes, it is effective to reduce the number of photolitho processes. The present inventor has studied about the reduction of the number of photolitho processes and the simplification of the photolitho process for many years. For example, in Japanese Patent Application Laid-open No. Hei 11-307780, a method of forming a resist mask having a plurality of regions in which film thicknesses are different from each other by a specified exposure method in the photolithography technique is proposed and a technique of manufacturing a TFT using such a resist mask is disclosed.
In order to reduce the manufacturing processes, a liftoff technique using the photolitho process is known except for the above-stated reduction method of the number of the photolitho processes. This liftoff technique is often used for forming wirings of a semiconductor integrated circuit, and used for reducing the manufacturing processes in manufacturing of the thin film transistors for a liquid crystal display device. Thus, first, the formation of the wirings by this liftoff technique as a conventional technique will be described with reference to FIGS.
1
(
a
) to
1
(
e
) based on the prior art disclosed in Japanese Patent Application Laid-open No. Hei 7-240535.
As shown in FIG.
1
(
a
), a lower layer electrode
202
as a gate electrode of a TFT is formed by patterning metal such as chromium on a glass substrate
201
that is a transparent insulating substrate (first photo resist (PR) process).
An insulation layer
203
as a gate insulation layer of the TFT is formed so as to cover the lower layer electrode
202
, and a semiconductor film as an active layer of the TFT is formed and then patterned to form a semiconductor region (not shown) of the TFT (second PR process).
To form a source electrode and a drain electrode of the TFT, a film of metal such as chromium for covering the semiconductor region is formed and then patterned to form the source electrode and the drain electrode (not shown) (third PR process). The source electrode and the drain electrode are used as masks for partially removing a high impurity concentration semiconductor layer formed on the surface of the semiconductor region. Then, the high impurity concentration semiconductor layer located between the source electrode and the drain electrode is removed.
With this state, a first resist mask
205
having a first opening
204
is formed by a known photolithography technique (fourth PR process). Then, using the first resist mask
205
as an etching mask, a contact hole
206
reaching the surface of the lower layer electrode
202
is formed in the insulation layer
203
.
As shown in FIG.
1
(
b
), using a photomask
209
having a light shielding portion
207
and a light transmitting portion
208
as a mask, the first resist mask
205
is again exposed with exposure irradiation light
210
. After this exposure, the above-stated resist film is developed by a general method.
Thus, as shown in FIG.
1
(
c
), a second resist mask
212
having a second opening
211
with a larger opening size than that of the above-stated contact hole
206
is formed (fifth PR process).
A metal film
213
is deposited on the entire surface by a sputtering method. Thus, as shown in FIG.
1
(
d
), the metal film
213
which directly covers the exposed surface of the insulation layer
203
, the second resist mask
212
and the lower layer electrode
202
is formed.
Then, the second resist mask
212
is removed by a general liftoff technique. In the removal process of this second resist mask
212
, the portion of the metal film
213
directly covering the second resist mask
212
is simultaneously removed to pattern the metal film
213
.
Thus, as shown in FIG.
1
(
e
), an upper layer electrode
214
connecting the lower layer electrode
202
through the contact hole
206
provided in the insulation layer
203
is formed.
As described above, in the conventional technique for forming wirings of two layers which are connected with each other, even if this manufacturing method is based on the liftoff technique or an etching technique, it is necessary to perform the photolitho process at least five times for forming the lower layer electrode at first and the upper layer electrode at the end.
Also, the above-stated conventional technique is to reduce the photolitho processes that utilize the liftoff technique. However, according to the conventional technique, in an etching, for example, dry etching of the insulation layer
203
, the first resist mask
205
is irradiated with light or ions, so that its surface is altered. Even if a pattern transfer to the first resist mask
205
thus altered is intended with the exposure irradiation light
210
described in FIG.
1
(
b
), since the light is scattered by the altered film surface, the exposure to the first resist mask
205
itself is not carried out. Thus, this method cannot be applied to the case where electrodes or wirings are formed to manufacture the active matrix substrate.
As described above, in the conventional technique, it is necessary to perform the photolitho process at least five times. This has been a factor for increasing the manufacturing cost. Thus, it is essential to reduce the number of photolitho processes for manufacturing the active matrix substrate for a liquid crystal display device, and technical developments are strongly desired.
Such a reduction of the number of photolitho processes necessarily will produce the increase of a manufacturing yield of a liquid crystal display device and the improvement of the productivity thereof, and further the reliability thereof.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a new pattern forming method in which the number of photolitho processes can be simply reduced.
Another object of the present invention is to provide a new method of manufacturing a TFT in which a manufacturing process of a liquid crystal display device can be greatly reduced.
In carrying out our invention in one preferred mode, we utilize a liftoff technique realized by a mask layer having different film thicknesses such that a first region, a second region thicker than the first region and a opening within the first region are formed in the mask layer. The mask layer is formed on a second layer that has a first layer thereunder, and then the second layer is etched to form a opening, which reaches a surface of the first layer, in the second layer using the mask layer as an etching mask. After the opening is formed, the first region of the mask layer is removed by etching the mask layer making the first region of the mask layer left as a third region at the same time. To form a third layer pattern connected with the first layer, a third layer is deposited on a whole second layer including the opening of the second la

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