Pattern forming method

Details Pattern forming method Pattern forming method

2000-05-01

2003-03-04

Gulakowski, Randy (Department: 1746)

Etching a substrate: processes

Masking of a substrate using material resistant to an etchant

C216S058000, C216S067000, C216S099000, C438S704000, C438S706000, C438S717000, C438S753000, C430S270100, C430S271100

Reexamination Certificate

active

06527966

ABSTRACT:

TECHNICAL FIELD
This invention relates to a method of forming a pattern and, more particularly, it relates to a method of forming a pattern composed of an etchable layer by conducting dry etching of an etchable layer formed on a substrate for semiconductor through a mask of patterned radiation sensitive material coating formed on the etchable layer, with an anti-reflective coating composed of an organic material being intervened therebetween.
BACKGROUND ART
With continuous miniaturization of a system using complicated semiconductor integrated circuits, much finer patterns of semiconductor circuits have been formed. With the progress of such miniaturization, it has become extremely difficult to create complicated circuits on a small size chip according to the pattern lithography method using a patterned radiation sensitive material coating as a mask. One of the reasons for the difficulty is that, since energy beams with shorter wavelength are used for exposure which can be reflected by the substrate or the etchable layer, the energy beams having traveled through the radiation sensitive material coating are reflected in non-uniform directions due to non-uniform step difference on the substrate or on the etchable layer, thus the radiation sensitive material coating being exposed in areas not intended to be exposed. This results in generation of a number of defects and dimensional fluctuation in patterns formed by the lithography method. As one approach to solve this problem, it has been proposed to provide under the radiation sensitive material coating an organic anti-reflective coating which can absorb the energy beams having passed through the radiation sensitive material coating and thus prevents the energy beams from being reflected in non-uniform directions after the energy beams having passed through the radiation sensitive material coating.
A conventional pattern-forming method using this anti-reflective coating will be described below by reference to FIGS.
3
(
a
) and
3
(
b
).
First, as is shown in FIG.
3
(
a
), an anti-reflective coating
3
composed of an organic material and capable of absorbing energy beams is formed on an etchable layer
2
deposited on a semiconductor substrate
1
, and a radiation sensitive material coating is further formed on said anti-reflective coating
3
. Then, the radiation sensitive material coating is exposed with energy beam through a mask, and exposed or non-exposed areas of the radiation sensitive material coating are removed with a developer to thereby form a patterned radiation sensitive material coating
4
composed of the non-exposed or exposed areas thereof. Subsequently, the anti-reflective coating
3
is dry-etched using the patterned radiation sensitive material coating
4
as a mask to remove those areas of the anti-reflective coating
3
which correspond to the openings of the patterned radiation sensitive material coating
4
. Further, the etchable layer
2
is dry-etched using the patterned radiation sensitive material coating
4
as a mask, followed by removing the anti-reflective coating
3
and the radiation sensitive material coating
4
to obtain a pattern
2
A composed of the etchable layer
2
on the semiconductor substrate
1
, as shown in FIG.
3
(
b
). The thus formed anti-reflective coating
3
absorbs energy beam having traveled through the radiation sensitive material coating
4
and thus serves to prevent non-uniform reflection even in the presence of stepped areas on the semiconductor substrate
1
or the etchable layer
2
and prevent exposure of areas not intended to be exposed, thus the etchable layer having the pattern
2
A with good dimensional accuracy being formed.
Recently, chemically amplified resists have often been used as the radiation sensitive material coatings. However, it has been found that, in the case of using the chemically amplified resists as the material of the radiation sensitive material coating and providing it on the anti-reflective coating, reaction products
5
are formed in the interface between the anti-reflective coating
3
and the radiation sensitive material coating
4
. When the radiation sensitive material coating
4
and the anti-reflective coating
3
are developed or etched under the ordinary condition, reaction products
5
can not be removed but remain on the etchable layer
2
. If the etchable layer
2
is dry-etched with the reaction products remaining, the reaction products
5
act as an etching mask, and there arises the problem that, as is shown in FIG.
3
(
b
), residues
6
of the etchable layer
2
are formed in those areas which are intended to be etched away (space areas) or that side walls
2
a
of the etchable layer
2
which are demanded to be vertical have a non-uniform profile. The residues
6
will be equally formed regardless of the pattern opening ratio of the radiation sensitive material coating
4
, that is, regardless of density of the pattern. Therefore, residues
6
can be formed in a space between patterns in an area crowded with patterns.
As a method for removing the reaction products
5
formed in the interface between this anti-reflective coating
3
and the radiation sensitive material coating
4
, it may be considered to conduct dry etching under the condition for removing the reaction product. However, a method of removing the reaction product
5
together with the anti-reflective coating
3
by dry etching is not effective as a method of forming a pattern in the etchable layer because of the following reason. That is, removal of the reaction products
5
requires stronger etching conditions than in the case of removing the anti-reflective coating
3
. Hence, when enough strong etching conditions to remove the reaction products are selected, the patterned radiation sensitive material coating
4
having about the same etching properties will be simultaneously etched away, thus resist pattern with good dimensional accuracy not remaining. Therefore, the patterned radiation sensitive material coating
4
can not function as a mask. On the other hand, if dry etching of the anti-reflective coating
3
is conducted under such condition that etching of the patterned radiation sensitive material coating
4
is minimized, reaction products
5
and the anti-reflective coating
3
will be remained a lot on the etchable layer
2
. Further, a dry etching process involving formation of a deposit on the side wall of anti-reflective coating
3
so as to improve dimension-controlling properties for the anti-reflective coating
3
would be liable to cause adhesion of the deposit coming off from the side wall of the anti-reflective coating
3
onto the etchable layer
2
, and the deposit would in turn function as a mask to form residues
6
composed of the etchable layer.
Problems to be caused when residues
6
composed of the etchable layer
2
and formed on semiconductor substrate
1
exist or when pattern side walls
2
a
of the etchable layer
2
have a non-uniform profile are described in more detail by reference to FIG.
4
.
FIG. 4
is an enlarged view of the area surrounded by one-dot chain line in FIG.
3
(
b
). As is shown in
FIG. 4
, gate electrodes
7
composed of polysilicon layer, i.e., the etchable layer, are formed on semiconductor substrate
1
, and residues
6
of polysilicon layer remain in the region between the gate electrodes
7
on the semiconductor substrate
1
, i.e., source drain region. Side walls
8
of an insulating material such as Si
3
N
4
, TEOS or HTO are formed on the side of gate electrodes
7
. In order to reduce resistance of resulting integrated circuit elements, surfaces of the gate electrodes
7
and the source drain areas are silicidated with TiSi
2
or the like to form a silicide layer
9
covering the surfaces. However, since side profiles of the gate electrodes
7
are non-uniform, gate electrodes
7
are partly bared from the side wall
8
. The silicide layer
9
is formed both on the bared area of the gate electrodes
7
and on the surface of polysilicon residues
6
. As a result, the gate electrodes
7
and t

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