Pattern formation process for an integrated circuit substrate

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S612000, C438S108000, C438S622000, C438S625000, C438S666000, C438S667000, C438S623000

Reexamination Certificate

active

06881662

ABSTRACT:
A pattern formation process for an integrated circuit substrate, which is not employing the conventional method of filling resin material directly in via filling process but adapting the metal spray method, the metal vapor deposition method or any combination thereof to form the pattern including circuits and pads and stuff the vias and the through holes.

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patent: 6521533 (2003-02-01), Morand et al.
patent: 6640434 (2003-11-01), Wojewnik et al.
patent: 20030203705 (2003-10-01), Leng

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